The TinyGo-TKey 0.1 release was in Golang Weekly, cool!

#golang #tinygo #embedded #security #fpga #riscv

https://golangweekly.com/issues/557

La Orange Pi R2S veut coller du RISC-V dans ton réseau
Avec une puce RISC-V et pas moins de quatre ports Ethernet, la Orange Pi R2S est pensée pour se glisser dans un réseau..
https://www.minimachines.net/?p=134610 #orangepi #riscv

Just released version 0.1 of TinyGo-TKey to develop apps for the Tillitis TKey-1 using TinyGo!

https://github.com/hybridgroup/tinygo-tkey

TKey-1 is an open source, open hardware FPGA-based USB security token from the awesome team at Tillitis:
https://tillitis.se/

Linux 6.16-rc1, verso un kernel più moderno e robusto

https://gomoot.com/linux-6-16-rc1-verso-un-kernel-piu-moderno-e-robusto

Highlights from @piwo :

- Open RISC-V cores on #FPGA with #Linux https://kuznia-rdzeni.org/ @coreforge
- the taste of silicon wafers
- #Bevy in the terminal with #ratatui demo (HOW??) @j_g00da
- the connection between throwing away good hardware and the continued growth of the economy
- "selling an electron #mikroscope for cheap" @q3k

#piwo2025 #riscv @dos

No i po piwie. Znaczy po @piwo -ie.

Najciekawsze rozmowy i projekty:
- Otwarte rdzenie RISC-V na #FPGA na których działa #Linux https://kuznia-rdzeni.org/ @coreforge
- smak wafli krzemowych
- Demo #Bevy w terminalu przez #ratatui (JAK???) @j_g00da
- rozmowa o połączeniu wyrzucania działającego sprzętu z rozwojem dzisiejszej ekonomii
- "sprzedam #mikroskop elektronowy w okazyjnej cenie" @q3k

#piwo2025 #riscv @dos

I've successfully configured GNU Guix offloading on VisionFive2 board (RISC-V) to my main machine, to speed up the building process.

Used this part of the Guix manual during the configuration:
https://guix.gnu.org/manual/en/html_node/Daemon-Offload-Setup.html

It was non-obvious for me that for RISC-V "build-machine" the "systems" list should contain "riscv64-linux" string (instead of "riscv64-linux-gnu" as "guix build --list-targets" prints.)

For my fellow ASM nerds: a full deep dive on the #tenstorrent #ISA and its implementation on WH is now live on our GH! https://github.com/tenstorrent/tt-isa-documentation/tree/main/WormholeB0/TensixTile

Para practicar con la Rasbpberry pi pico2 en ensamblador del #Riscv he hecho un mini-kernel que permite multiplexar dos tareas

Es muy emocionante ver las dos tareas ejecutándose concurrentemente

El código está en este repositorio de github:
https://github.com/Obijuan/JANEL-OS

So, I’m not a programmer, I can usually hack things to make them work.
But, I’m stuck so I’m asking for advise please.
I’m using windows (not for much longer) and I’ve got a neorisc-v onto my Alchitry au board (it gets to the bootloader) but I can’t seem to compile any of the examples. I found a prebuilt windows compiler (.zip) but I’m lost what to do next. Can anyone help?
#riscv #fpga

OrangePi RV2: The New Reference SBC for RISC-V Enthusiasts: https://boilingsteam.com/orange-pi-rv2-new-risc-v-board-review/
#linux #update #hardware #riscv #orangepi #rv2 #sbc #review

I finally got all my #RetroComputing development tools to compile for #RISCV, 3 of them were originally broken.

Usptream maintainers have already fixed 2 of them, and I've just filed a bug report for the last one.

RISC-V under qemu on my 13900K is about fast enough to emulate an Amstrad CPC at half speed. Hopefully I can get real hardware soon and get better performance. Ubuntu 25.10 is a few months away :)

I'm considering #RISCV CPUs. I'm looking for open source RV32IMC with good debugging support and interrupts. Simplicity is more important than performance. I prefer Verilog. VexRiscv is an old favourite and Hazard3 is an interesting new option. What else should I consider? #FPGA

Some more #RiscV cross-compile fixes for #NixOS nixpkgs This time needed as a dependency for composer build of a php web app https://github.com/NixOS/nixpkgs/pull/411195

More projects run on Open Source Hardware ESP32-P4-DevKit EUR 16 board with Espressif Dual Core RISC-V SOC https://www.youtube.com/shorts/PqLHHtLoO7w #esp32 #iot #espressif #riscv

Did you know that the bios on your x86 or Arm is proprietary. That's why Risc V is changing the world. https://fossforce.com/2025/05/rocky-linux-10-will-run-on-risc-v/
#foss #floss #opensource #riscv

ASM-editor is a modern web application for writing, executing and learning M68K assembler code, which uses the SvelteKit framework and the Rust programming language.

The tool now supports not only 68k and x86 assembly language, but also RISC-V and offers assembly courses for learning assembly.

https://www.amiga-news.de/en/news/AN-2025-05-00106-EN.html

It’s official: RISC-V will be joining the Rocky Linux 10 architecture lineup!

This milestone wouldn’t be possible without the incredible work of the Fedora RISC-V community. We’ve built on their upstream-first foundation to bring riscv64gc into the Rocky family—alongside x86_64, aarch64, ppc64le, and s390x.

Big thanks to @fedora, @RISC-V International, and everyone helping push open hardware forward.

Read more: https://rockylinux.org/news/rockylinux-support-for-riscv
#RockyLinux #RISCV #Fedora #AltArch

k0s 1.33.1 was released yesterday. This release works on RISC-V but you have to build it yourself.

https://github.com/k0sproject/k0s/releases/tag/v1.33.1%2Bk0s.0