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#riscv

4 messages4 participants0 message aujourd’hui
Public *
Dimly Lit Corners

#Goals2025

Moving away from the constant upgrade cycle & moving closer to the ideals of #PermaComputing #MalleableSoftware

Design and setup a redundant system of old/used, cheap, low-power devices running oa #Guix, #Linux, #FreeBSD, #macOS, #HaikuOS, #Plan9Front, #X11 working together

Become an expert on #MicroControllers #ESP32 #STM32 #RP2040 #MIPS #RiscV

Move as much as possible of my computing needs to the #Terminal and #Emacs. #CLI #TUI

Get an #3DPrinter and learn to use it

Design and build my own portable 8dot #braille terminal & try out if 3x3 or 3x4 dots is also workable.

Design and build my own low-power computers, their OS, and tools

Writing more of my own tools #DIY

#SmallTalk #ObjectPascal #Prolog #Scheme #Racket #CommonLisp #Haskell #Rust #Go #ObjectiveC #Swift

Deploy #LoRa #ReticullumNetwork #RNodes #MeshCore #Meshtastic

Start an #InternetResiliencyClub

Add #Tor, #I2P support by #WebProxy

#SelfHost over #I2P and as #OnionService

#SolarPowered servers

SelfHost a blog/wiki

SelfHost my own repositories
#Darcs #Mercurial

SelfHost my own #EmailServer, will only accept email from #KnownHosts #MutualEmailAcceptance and otherwise only if they contain an proper #OpenPGP signature

Share files via #BitTorrent over #I2P

DIY #HomeAutomation

Start #Gardening #GreenHouse #GardeningAutomation

Get a house cat

Start asking money for advice & technology support
…

#Incomplete#Ongoing#NotFinal
A répondu dans un fil de discussion
Public
Jean-Baptiste "JBQ" Quéru

In my little world of #RetroComputing, I have stumbled across minor issues in some of the tools that I use.

I've had two cases so far where maintainers very quickly took my suggestion and made it available in their main branch. I've also had one where I haven't heard back from the maintainer, i.e. where I'm going to need to maintain my own fork (for #RiscV compatibility). And that's OK. Beyond being glad that I got help, I'm glad that the original authors allow me also to do the work myself.

Public
deadprogram

Just released version 0.1 of TinyGo-TKey to develop apps for the Tillitis TKey-1 using TinyGo!

github.com/hybridgroup/tinygo-

TKey-1 is an open source, open hardware FPGA-based USB security token from the awesome team at Tillitis:
tillitis.se/

GitHubGitHub - hybridgroup/tinygo-tkey: Develop applications for the Tillitis TKey-1 using TinyGoDevelop applications for the Tillitis TKey-1 using TinyGo - hybridgroup/tinygo-tkey
#golang#tinygo#embedded
Public
dorotaC

No i po piwie. Znaczy po @piwo -ie.

Najciekawsze rozmowy i projekty:
- Otwarte rdzenie RISC-V na #FPGA na których działa #Linux kuznia-rdzeni.org/ @coreforge
- smak wafli krzemowych
- Demo #Bevy w terminalu przez #ratatui (JAK???) @j_g00da
- rozmowa o połączeniu wyrzucania działającego sprzętu z rozwojem dzisiejszej ekonomii
- "sprzedam #mikroskop elektronowy w okazyjnej cenie" @q3k

#piwo2025 #riscv @dos

kuznia-rdzeni.orgCoreforge Foundation | Fundacja Kuźnia Rdzeni
Public
avp

I've successfully configured GNU Guix offloading on VisionFive2 board (RISC-V) to my main machine, to speed up the building process.

Used this part of the Guix manual during the configuration:
guix.gnu.org/manual/en/html_no

It was non-obvious for me that for RISC-V "build-machine" the "systems" list should contain "riscv64-linux" string (instead of "riscv64-linux-gnu" as "guix build --list-targets" prints.)

guix.gnu.orgDaemon Offload Setup (GNU Guix Reference Manual)Daemon Offload Setup (GNU Guix Reference Manual)
#guix#riscv
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Paula Maddox

So, I’m not a programmer, I can usually hack things to make them work.
But, I’m stuck so I’m asking for advise please.
I’m using windows (not for much longer) and I’ve got a neorisc-v onto my Alchitry au board (it gets to the bootloader) but I can’t seem to compile any of the examples. I found a prebuilt windows compiler (.zip) but I’m lost what to do next. Can anyone help?
#riscv #fpga

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Jean-Baptiste "JBQ" Quéru

I finally got all my #RetroComputing development tools to compile for #RISCV, 3 of them were originally broken.

Usptream maintainers have already fixed 2 of them, and I've just filed a bug report for the last one.

RISC-V under qemu on my 13900K is about fast enough to emulate an Amstrad CPC at half speed. Hopefully I can get real hardware soon and get better performance. Ubuntu 25.10 is a few months away :)

Public
Flux

I'm considering #RISCV CPUs. I'm looking for open source RV32IMC with good debugging support and interrupts. Simplicity is more important than performance. I prefer Verilog. VexRiscv is an old favourite and Hazard3 is an interesting new option. What else should I consider? #FPGA

ExplorerFlux en direct
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